Simulator for PDP11 on BM370

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dc.contributor.authorGovinathan, P.
dc.date.accessioned2015-08-25T07:13:21Z
dc.date.available2015-08-25T07:13:21Z
dc.date.issued1979-03
dc.description.abstractThis report describes the design and implementation of a PDP-11 simulator to be run on the University's IB! 370/148. The simulator program consists of a set of routines written in IBH370 assembly language and vas implemented under the time-skaring system of the Virtual flachine Facility running under the Conversational Monitor System. The simulated system is of the PDP-11;45 model of the PDP-11 family of computers and its features include instruction simulation of sixty-seven of the l?DP-11/45's instruction set inclus.i. ve of condition codes setting, its absolute loader, a decoder to decade the instructions, a locater to locate operand addresses, stacks, error detection facilities and subsequent processor interrupts.en_US
dc.identifier.urihttp://hdl.handle.net/123456789/1105
dc.language.isoenen_US
dc.subjectPDP11 on BM370en_US
dc.titleSimulator for PDP11 on BM370en_US
dc.typeThesisen_US
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