Publication: Design and simulation of low power CMOS filter with improved adder efficiency for biomedical applications
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Date
2024-08
Authors
Siew, Shin Hu
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Abstract
Digital Signal Processing (DSP) is important in biomedical engineering, enabling thorough analysis of physiological signals. Finite Impulse Response (FIR)
filters are preferred in biomedical applications due to their stability and linear phase response. Optimizing adders in FIR filters is crucial to reduce power consumption and enhance efficiency. This project aims to compare the performance of 4-bit Ripple Carry Adder (RCA), 4-bit Carry Save Adder (CSA), and 4-bit Carry Lookahead Adder (CLA) using 180nm CMOS technology, to obtain an adder design with propagation delay less than 50ps, less than 70 transistors, and a power consumption of lower than 6μW. The focus is on achieving small area and low power consumption for biomedical applications. The Mod-GDI technique is applied to optimize performance by reducing the number of transistors in logic gates. Pre-layout simulation results of the 4-bit CLA achieve a propagation delay of 13.71ps, using 52 transistors, and consuming 0.3331μW of power. The CLA demonstrated a 25.7% reduction in transistor count, an 18.7% reduction in delay, and a 92.6% reduction in power consumption compared to a reference design in post-layout simulation. The study emphasizes the importance of the Mod-GDI technique in optimizing digital circuit designs, offering strong improvements in efficiency and performance. Future work should focus on minimizing parasitic effects through enhanced layout design techniques and exploring the scalability of the Mod-GDI technique to larger bit-width adders and more complex digital circuits.