Pusat Pengajian Kejuruteraaan Elektrik dan Elektronik - Monograf

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    Rekabentuk susun atur Makro sel VLSI dengan Hibrid genetik algoritma.
    (2006-05)
    Tan,Kah Keng
    Several of the tasks involved in VLSI design process involve optimization. Genetic algorithms have been used as a well-suited technique for selected combination optimization problems. Due to tree- structured genotype representation and hybrid, problem-specific operators, the proposed approach is able to deal with different constraints. The major objectives of this project are chip area minimization and interconnection wire length minimization. The genetic algorithm uses three main types of rules at each step to create the next generation from the current population: Selection rules select the individuals, called parents, which contribute to the population at the next generation. Crossover rules combine two parents to form children for the next generation. Mutation rules apply random changes to individual parents to form children. The problem specific knowledge and existing solution techniques can be used to decide a suitable encoding scheme and its interpretation. We can create genetic operators for the new type of coding and can make use of the domain-based heuristics while applying these genetic operators.
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    Rekabentuk satu teknik teraair berasaskan “wavelet” Untuk tujuan pengesahan dan pemulihan imej.
    (2006-05)
    Chia, Chung Kwang
    The Internet technology and image processing technique have become more and more advance. Since the distribution of multimedia content such as digital images across the internet has become easier, the image may be tampered and published by an illegal user. Thus, it is difficult to determine whether an image is authentic or not. In this dissertation, a watermarking technique for image authentication and recovery isproposed. In this scheme, image-content-related features are first extracted and embedded as a watermark into the wavelet domain of the image. In features extraction process, the image is first divided into non-overlapping and equal-sized block. Then for each block, the average of pixel intensities is calculated and the results will be used as the image features. Then, extracted watermark is used to detect whether the image was tampered or not. If the image has been modified, the watermark will be used to restore the tampered parts. The watermarking scheme can support both color and grayscale images. The experimental results indicated that the proposed algorithm is able to detect tampering on image as well as recovering the tampered parts.
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    Rekabentuk penghantar UART 8-bit berdasarkan FPGA.
    (2006)
    Zaidan, Mohd Dhiya Hakim
    Dengan dunia teknologi semakin berkembang pesat, maka pelbagai peranti baru telah dicipta dengan pelbagai fungsi.. Ada diantara peranti-peranti ini yang boleh berkomunikasi dengan komputer peribadi. Komunikasi secara sesiri lebih banyak memberikan kelebihan kerana ia mampu beroperasi dengan jarak yang berbeza. Namun begitu, ada diantara peranti-peranti ini yang menghasilkan data secara selari. Oleh itu, kehadiran sebuah peranti yang mampu menukar data daripada data selari kepada sesiri adalah penting. Selain itu, peranti ini juga perlu mematuhi protokol dalam perhubungan agar data-data yang dihantar dapat digunakan dengan sebaik mungkin. Projek ini bertujuan untuk merekabentuk 8-bit penghantar UART (‘Universal Asynchronous Receiver- Transmitter’) berasaskan konsep FPGA dengan menggunakan perisian XILINX. Rekabentuk UART ini melibatkan 3 makrokod utama iaitu penukar selari ke siri (‘Parallel to-Serial Converter’) 8-bit, Penfaktor Baud (‘Baud Factor’) dan UART. Penghasilan makrokod penukar selari ke siri adalah untuk menukar 8-bit data selari kepada data sesiri. Penjana baud digunakan untuk memilih kadar baud bagi penghantaran data sesiri. Makrokod UART adalah makro yang telah lengkap dan mengandungi kedua-dua makro yang telah dinyatakan sebelum ini. UART yang telah direkabentuk ini memerlukan 15 % Dari CLB (Combinational Logic Block) dan frekuensi maksimum yang dibenarkan untuk sistem ini ialah 43.2 MHz
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    Rekabentuk litar pembetul faktor kuasa menggunakan Pengawal faktor kuasa MC33262.
    (2006-05)
    Mazlan, Nurul Uyun
    The main objective of this project is to design a power factor correction circuit. Power factor controller MC33262 is used in active power factor correction circuit. The power factor corrector stage is inserted between the input bridge and the bulk capacitor for corrected the power factor at alternate current (ac) line. Utilising bridge rectifier in electric utility causes a non-linear input current. This non-linear input current increases harmonic components and causes low power factor (0.6-0.7) along with high Total Harmonic Distortion THD. Thus, Boost converter topology is use as current and voltage regulation technique for deceases harmonic components with produce input current same with input voltage waveform. This Boost converter operates in critical conduction mode and current-mod control switching following the MC33262 power factor controller characteristics. Simulation and analysis of this design is conducted using OrCad Release 9.1 software. Hardware also conducted to produce the results that are required. From the simulation of circuit without power factor correction, power factor is 0.9989 with THDi about 4.78%. But circuit with power factor correction have higher THDi which about 94.96% with power factor 0.72. So, the power factor has been improved. The minimum efficiency is 92%. Hardware testing failed.
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    RFID transponder/tag using active integrated antenna (AIA).
    (2006-05)
    Abdul Barri, Farhah
    Project given is to design a transponder/tag using active integrated antenna (AIA) at 2.4 GHz. The main problem is to obtain the conversion gain at the desired frequency. As the frequency is too large, the appropriate components are too expensive to get. At first only Low Noise Amplifiers (LNA), Modulator and Demodulator being used, but the Modulator and the Demodulator at the required frequency are possible to get due to the cost problem. A mixer has been created to up counter or down counter the 2.4GHz frequency to 250 MHz frequency matched the modulator or demodulator frequency. All the circuit design will be created using HP-ADS (Advanced Design System) and later transferred to the Printed Circuit Board (PCB) for real measurements. Through the software simulation, the results of conversion gain and port to port isolation will be considered as a bench mark to the real measurement. Additionally, all the problem that may occur from the design and analysis will be consider and the inaccurate result from real measurement will be discussed. As the necessity to keep this design small and convenient, most of the parts used are surface mount type apart from this type is effective cost and applicable with the practical usage. Therefore, it is possible to reduce the intricacy during the fabrication and analysis by using this type as all the specification and details of every component can be found in each of its’ data sheets. In future project, one may consider to design a writable transponder/tag to enhance this design and to improve the usage in variety application.