Publication: Intelligent sequential repeater placement in soc design through reinforcement learning
| datacite.subject.fos | oecd::Engineering and technology::Electrical engineering, Electronic engineering, Information engineering::Electrical and electronic engineering | |
| dc.contributor.author | Kee, Kang Yik | |
| dc.date.accessioned | 2025-05-19T08:58:19Z | |
| dc.date.available | 2025-05-19T08:58:19Z | |
| dc.date.issued | 2024-07 | |
| dc.description.abstract | As the computational demands of artificial intelligence (AI) in chips skyrocket, the significance and complexity of interconnections grow notably. Therefore, optimizing the performance of system-on-chip (SoC) designs can be a challenging process, especially when it comes to positioning sequential repeaters. The placement of repeaters often requires strategic planning, as they are crucial for meeting the timing requirements of timing-critical topologies within the chip. They play a key role in strengthening signals to improve the overall power, performance, and area (PPA) of the SoC. In the traditional manual method, commonly used in the design flow, inefficiencies such as susceptibility to human mistakes and time consumption are evident. This project introduces a novel tool flow methodology (TFM) that leverages reinforcement learning (RL) to automate and optimize the placement and number of repeaters to meet the timing requirements in SoC designs. The Fusion Compiler (FC) tool with Python bindings is implemented as the RL environment. Moreover, a set of parameters, actions, states, and feedback (rewards or penalties) resulting from the timing delay after each subsequent placement of the repeaters from the environment are well-defined. In short, the current prototype proves the concept that the RL-driven approach demonstrates comparable performance to human expertise by offering a promising new automated solution for timing-aware sequential repeater placement by integrating RL and Topology Interconnect Planning (TIP) features into the FC tool. | |
| dc.identifier.uri | https://erepo.usm.my/handle/123456789/21730 | |
| dc.language.iso | en | |
| dc.title | Intelligent sequential repeater placement in soc design through reinforcement learning | |
| dc.type | Resource Types::text::report::technical report | |
| dspace.entity.type | Publication | |
| oairecerif.author.affiliation | Universiti Sains Malaysia |