Publication: VLSI design for low power home automation system
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Date
2023-08
Authors
Tan, Yong Liang
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Abstract
The concept of home automation has attracted the attention of researchers and practitioners since past decades. Home automation having a huge market potential due to advancement of technology which lead to the rise of automation era. Thus, this project aims to design a compact Very Large Scale Integration (VLSI) based low power home automation system that integrate of three main subsystems which are environmental regulator system, security system and automated load transfer switch system. The process being automated is associated with input sensors. VLSI design processes including both front-end and back-end were implemented in designing the proposed home automation system by using Synopsys Electronic Design Automation EDA) tools. Front-end design including design and simulation of proposed system behaviour and functionalities in Register Transfer Level (RTL) by using Verilog Hardware Description Language (HDL). Besides, logical synthesis was implemented to generate the gate-level netlist for physical implementation in back-end design process. Low power techniques including clock gating and power optimization through comparison of RTL coding using different Verilog implementation were performed to achieve a low power consumption design. Power optimization also could be achieved with the use of EDA tools during VLSI design processes. The design metrics including the main focus which is power consumption were examined at both logical synthesis and physical implementation design stages. The final design of the proposed system consumed a total power of 98.6655µW with cell area of 4384.20µm2.