Publication: Advanced logic locking techniques for securing digital signal circuits in smart calculator CPUS
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Date
2024-08
Authors
Nuurul Asma Aika binti Mohammed Zainal Abidin
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Abstract
This project focused on implementing logic locking techniques on digital signal circuits within CPUs to fortify their security against threats such as intellectual
property (IP) theft, unauthorized access, and overproduction. Given the critical importance of securing CPU designs, this project aimed to ensure the integrity of
CPUs, which play a central role in various technological applications, by safeguarding sensitive information and maintaining system reliability. To address vulnerabilities and potential threats, logic locking was applied to the CPU circuit, transforming the design to function only with specific key inputs. This enhancement mitigated the risk of IP theft and unauthorized access. The methodology involved simulating the CPU Verilog code in Synopsys to generate a netlist, which was then generate the circuit and tested using testbench. Other than that, Quartus II will be use in testing the circuit performance in terms of power, timing analysis and number of components and area utilization. Logic locking was applied to the original CPU circuit, rendering it inoperable without specific key inputs. This approach addressed existing vulnerabilities, particularly in digital signal circuits susceptible to IP attacks. The results demonstrated the efficacy of logic locking in enhancing CPU security. By comparing the behaviours of the original and modified circuits, it was observed that logic locking effectively prevented unauthorized operation and tampering. The findings underscored the significance of incorporating logic locking techniques into CPU design to mitigate the risk of IP theft and unauthorized access. By fortifying CPU security, organizations can ensure the integrity of their systems and protect sensitive information from potential adversaries. The key finding was the successful implementation of logic locking techniques to enhance CPU security, preventing unauthorized operation and tampering. These results have significant implications for the cybersecurity landscape, highlighting the importance of implementing robust
security measures in CPU design. In conclusion, the project successfully demonstrated that by integrating logic locking, CPU security can be significantly enhanced, thereby protecting against IP theft and unauthorized access. This approach ensures the integrity of systems in an increasingly interconnected world, emphasizing the need for robust security measures in CPU design.