Publication: Power estimation of channel link in network-on-chip (NOC) using machine learning
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Date
2023-08
Authors
Cheng, Khe Xian
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Abstract
The demand for complex system-on-chip (SoC) design is emerging nowadays as semiconductor industry is advancing. Network-on-chip (NoC) is introduced as a new solution to alleviate problems such as huge number of IPs and complex caches schemes that exist in traditional bus-based architecture. Channel link is one of the power consuming components in NoC and thus it is crucial to estimate its power consumption. In the past, traditional power estimation methods for NoCs depend on simulations and analytical models which were time-consuming and resource intensive. In recent years, machine learning approaches have indeed emerged as a promising solution in power estimation of NoC. Therefore, machine-learning based approach to perform power estimation on channel link in NoC is proposed in this research. The proposed framework is focused on developing different machine learning regression model such as decision tree (DT), random forest (RF) and support vector regression (SVR) by using Python on Jupyter Notebook platform. The goal is to determine the best fit machine learning model in estimating power of NoC channel link. The models are trained and tested with a total of 1508 data provided by the company. The hyperparameters are optimized to enhance the performance of each model. The performance of each machine learning model is evaluated and compared by using multiple performance metrics such as R2 score, mean absolute error (MAE), mean square error (MSE) and root mean square error (RMSE). Based on the results obtained, it is clearly observed that random forest model outperformed other models by achieving the highest R2 score of 0.9507 as well as lowest MSE and RMSE of 1.564e-10 and 1.251e-5 respectively. In short, random forest model has been found to be the most suitable model for achieving the highest accuracy in power estimation of NoC channel link.