Publication: Development of ofdm demodulator using fpga
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Date
2012-06-01
Authors
Ngu, Teck Luk
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Abstract
Orthogonal Frequency Division Multiplexing (OFDM) is an effective transmitting technique which stress on channel equalization for bandwidth efficiency. It essentially same to coded OFDM and discrete multi-tone modulation (DMT) which is identical to the frequency division multiplexing scheme used as a digital multi carrier modulation method. Nowadays, wireless communication system use OFDM technique due to its high speed capability which can reduce major issue occurs in wireless transmission i.e Inter-symbol Interference (ISI). In this project the OFDM demodulator is programmed into Field Programmable Gate Array (FPGA) for producing a prototype device. FPGA is easy to implement and able to update the functionality of the design or partial reconfiguration of a portion of the design and lower the non-recurring engineering costs relative to an ASIC design. This project aims to focus on the specific issues related to Reed Solomon Decoder (RS Decoder) in Quartus II software design. In previous year, the issue of RS Decoder causes the loss of transmission of data at the receiver. Once software goes well, the design will be integrate to hardware for real condition test. This project has been carried out and almost completes the software part. The Reed Solomon Decoder issue had been solved which a complete set of data can be decoded correctly without loss. But the final part of combining both decoded stream of data still on progress. It is hope that with the research and the explanation in this report can help in future enhancement of this design to make a success.