Publication: Harnessing artificial intelligence for debug, analysis, and resolution to improve RTL quality
| datacite.subject.fos | oecd::Engineering and technology::Electrical engineering, Electronic engineering, Information engineering::Electrical and electronic engineering | |
| dc.contributor.author | Ong, Kean Guan | |
| dc.date.accessioned | 2025-05-26T08:43:34Z | |
| dc.date.available | 2025-05-26T08:43:34Z | |
| dc.date.issued | 2024 | |
| dc.description.abstract | Nowadays, the logic synthesis level is one of the most important steps to ensure the gate-level netlist meets the quality such as power, area, timing, formal verification, and electrical rule check so that the RTL’s quality is well prepared. Currently, the traditional methodology to fulfill these requirements is heavily manual work and consumes more time with a minimum of a week (intel’s engineer) and resources to identify the respective netlist violations whether to be fixed or waived. It turns out that this project presents the harnessing of Artificial Intelligence (AI) or Machine Learning (ML) at the logic synthesis level to improve the RTL quality by debugging, analyzing, and resolving the expected violations. The purpose of this project was to figure out which machine learning algorithms were the most suitable for the current issue (text classification) to improve the RTL quality based on the metrics Receiver Operating Characteristic (ROC), Area Under the Curve (AUC), and Log loss. Besides that, an AI system that was capable of training on new datasets without retraining the model from scratch was also built based on the top-performance algorithm result with a time reduction of at least 50%. The user-force feedback process was also developed, allowing the model to become much more intelligent after the same dataset was retrained with the user's higher confidence level compared to the AI decision-making. Based on the result, SVM was the best algorithm with 99.8 accuracy for the issue. The use of SGDClassifier and MLPClassifier gave a reduction in training time of more than 50% which indicated the successful development of incremental learning mechanism. However, the final model used was MLPClassifier due to the ability to improve the model intelligence and provide incremental accuracy of more than 50% on the same data patterns compared to SGDClassifier. In conclusion, the MLPClassifier will act as the final model to be deployed with the ability of incremental learning and user-force feedback mechanisms | |
| dc.identifier.uri | https://erepo.usm.my/handle/123456789/21897 | |
| dc.language.iso | en | |
| dc.title | Harnessing artificial intelligence for debug, analysis, and resolution to improve RTL quality | |
| dc.type | Resource Types::text::report::technical report | |
| dspace.entity.type | Publication | |
| oairecerif.author.affiliation | Universiti Sains Malaysia |