Publication: Design and implementation of a novel buck converter
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Date
2012-07-01
Authors
Chua, Christopher Kim Loong
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Abstract
This thesis presents a novel buck converter topology. This novel topology was designed and implemented alongside a conventional buck converter. Both topologies were analyzed to obtain mathematical expressions which helped explained their behaviour. This was followed by design of the circuits’ parameters, where the frequency, duty cycle and components’ ratings were decided. Using the parameters which were determined, the circuits were simulated using Orcad Pspice Family Release 9.2. The simulations were also used to help further the understanding of the novel buck converter’s behaviour relative to the conventional buck converter. With the knowledge of the circuits’ behaviours, both the circuits were implemented on PCB for experimentation. The circuits’ hard-switching were done by PWM gating signals fed into an IGBT. Operated under an input voltage of 60V at various duty cycles (0.3, 0.5 and 0.7), data and waveforms of the operating circuits were gathered for a fixed load of 50 ohms. Data of the circuits included input and output voltages and currents, capacitor and diode voltage stresses as well as inductor voltage drop. Waveforms which were obtained were input current, output voltage ripple, inductor current and capacitor current ripple. The results were analyzed to determine if the novel converter had performed according to analysis. Both circuits were also compared in terms of efficiency and capacitor voltage stress. Based on the results from simulation and experiment, it was found that both converters were similar in terms of circuit behaviour and performance. The novel buck converter which was developed had a maximum efficiency of 89.2% for 0.7 duty cycle.