Publication:
Serial communication via usb port implemented by using usb-jtag link on altera de1 educational and development board

Loading...
Thumbnail Image
Date
2008-03-01
Authors
Arumugam, Dheenagaran
Journal Title
Journal ISSN
Volume Title
Publisher
Research Projects
Organizational Units
Journal Issue
Abstract
Universal Serial Bus ( USB ) is the ultimate mode of communication in the world of electronic communications. Many Human Interface Devices ( HID ) such as keyboard and mouse are using USB protocol in order to communicate with the Personal Computer. In this project, Serial Communication has to be performed with a Graphical User Interface (GUI ) by using the USB-JTAG link on the Altera DE1 Educational and Development Board. The GUI that was used in this project was created by the Altera’s support team and only the LEDs and Seven Segment Driver section (software level) are used in this project in order to drive four seven segment displays, eight Green LEDs and ten Red LEDs on board. The drop boxes on the GUI allows the user to select hexadecimal characters ranging from 0 to F to be displayed on the seven segment displays and the check boxes beside each Red and Green LEDs has to be checked in order to light up the corresponding LEDs. A total of 96 bits of data which is encoded in USB format is sent to the USB connector on the DE1 Board whenever the SET button on the GUI is pressed. The USB-JTAG link comprises of the FT245BL IC, MAX3128 CPLD and Cyclone II JTAG Configuration port. The FT245BL IC decodes the 96 bits of data in USB format in order to remove redundant bits which plays a role in sending the data and sends it to the MAX 3128 CPLD in parallel mode. The MAX 3128 CPLD sends the data to the Cyclone II Configuration Port by using the Joint Test Action Group (JTAG) Serial Communication protocol. Therefore, a USB-JTAG Receiver which mimics the operation of the JTAG port is created by using Verilog codes to capture the 96 bits of data in order to drive the LEDs and seven segment displays whereby 48 bits of data are responsible to drive LEDs and another 48 bits are for the four seven segment displays. The Quartus II Version 6.0 was used to compile and to run simulations in order to verify the operation of the USB-JTAG Receiver and also to download the bitstream file into the Cyclone II EP2C20F484C7 FPGA.A Reset KEY was used to reset the the operation are implemented as well.
Description
Keywords
Citation