Publication: Buffer design for the inductively-degenerated lna for w-cdma application
| datacite.subject.fos | oecd::Engineering and technology::Electrical engineering, Electronic engineering, Information engineering | |
| dc.contributor.author | Wong, Pi We | |
| dc.date.accessioned | 2024-07-22T03:10:38Z | |
| dc.date.available | 2024-07-22T03:10:38Z | |
| dc.date.issued | 2009-04-01 | |
| dc.description.abstract | In this thesis, a 0.18μm CMOS buffer design for a PCSNIM W-CDMA LNA was proposed and analyzed in detail. This buffer is a simple class-AB voltage follower which uses a capacitor as feedback and a cascode current mirror as the biasing circuitry. Together with the PCSNIM LNA, this buffer design was simulated using Cadence SpectreRF. This design was implemented using Silterra 0.18μm technology and draws 0.99mA current from the voltage supply of 1.8V. This buffer operates with the PCSNIM LNA in the frequency range of 2110MHz to 2170MHz. At frequency 2.14GHz, the S21 is 17.57dB, S12 is - 67.19dB while S11 and S22 are -16.41dB and -24.45dB respectively. The NF is 1.82dB and NFmin is 1.65dB. The P1dB is -25.11dBm and IIP3 is -14.56dBm. Comparing to common drain buffer, this buffer has 16.65% lower gain but 16.69% higher linearity. Besides of that, it consumes 37.34% lower current. | |
| dc.identifier.uri | https://erepo.usm.my/handle/123456789/19795 | |
| dc.language.iso | en | |
| dc.title | Buffer design for the inductively-degenerated lna for w-cdma application | |
| dc.type | Resource Types::text::report | |
| dspace.entity.type | Publication | |
| oairecerif.author.affiliation | Universiti Sains Malaysia |