Pusat Pengajian Kejuruteraaan Elektrik dan Elektronik - Tesis

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Hybridized chaotic-oppositional based learning differential evolution and arithmetic optimization algorithm for global optimization
(2024-12-01)
Mohamad Faiz, Ahmad Johari
Differential evolution (DE) is a popular Metaheuristic Search Algorithms (MSAs) used to solve various optimization problems due to its simplicity and rapid convergence speed. However, its success in diverse optimization scenarios depends critically on the quality of the initial population and the ability to balance exploration and exploitation processes. Therefore, this research proposes two novel DE algorithms, namely, Chaotic Oppositional DE (CODE) and Multi-Chaotic Oppositional DE hybridized with the Arithmetic Optimization Algorithm (MCO- DEHAOA), to address the aforementioned challenges. In CODE, a modified initialization scheme leverages the benefits of both (i) chaotic map and (ii) Oppositional-Based Learning (OBL) strategy. Chaotic map is particularly useful for addressing premature convergence by producing initial solutions with higher diversity levels. Meanwhile, the OBL strategy aims to enhance the algorithm's convergence speed by exploring wider areas of the solution space during the initialization phase. On the other hand, MCO-DEHAOA, an extension from CODE, incorporates two key enhancements, (i) the Multi-Chaotic Oppositional (MCO) initialization technique and (ii) a modified mutation scheme. The MCO technique leverages multiple chaotic maps and the OBL strategy to generate an initial population with superior solution quality compared to CODE. Furthermore, the modified mutation scheme in MCO-DEHAOA synergizes the DE/rand/1 mutation strategy from DE with the Addition and Subtraction operators from Arithmetic Optimization Algorithm (AOA), thus fostering a more effective balance between exploration and exploitation processes. The overall performance of both proposed algorithms have been compared with several state-of- the-art algorithms on the Congress of Evolutionary Computation (CEC) benchmarks and three real-world engineering design problems. The proposed CODE demonstrates promising results, achieving the best mean error (Emean) in 26 out of 30 CEC 2014 benchmark problems. Meanwhile, the proposed MCO-DEHAOA emerges as a well- balanced optimizer, producing the best Emean in 28 out of 29 CEC 2017 benchmark problems. The enhancement of initial solution quality and the balance between the exploration and exploitation processes are proven to be crucial, as simulation results show significant improvements in the quality of the final solutions.
Design and fabrication of all-solution-processed low-voltage organic thin film transistors using direct-write printing technique towards flexible electronics applications
(2024-12-01)
Nur Syahadah, Yusof
Amidst the rising global demand for printed electronics and wearable devices, researchers have investigated various manufacturing techniques to fabricate organic devices, including Organic Thin Film Transistors (OTFTs). As a pivotal deposition method in printed electronics, inkjet printing enables the deposition of solution processable materials onto various substrates via simpler fabrication steps at lower processing temperatures, which is suitable for flexible electronic applications. Although the inkjet printer has been the predominant option in manufacturing organic devices, nonetheless, the persistent clogging issue encountered at the printer’s nozzles has emerged as a major drawback of this technique. Furthermore, the stringent requirements of the conductive inks and substrate states have limited the material selection and hampered the efforts to commercialize OTFT fully in the market. Besides, oxide-based dielectric materials such as Silicon Dioxide (SiO2) have been exploited thanks to their remarkable electrical characteristics in OTFTs. However, the practical implementation of OTFTs is significantly impeded by the high operating voltage resulting from a low gate capacitance density of conventional SiO2 dielectric. Thus, this study presents a simple and direct solution-based fabrication approach to develop a low-voltage OTFT. A novel direct-write printing technique was employed to deposit the electrodes, i.e., source/drain and gate terminals of OTFTs at low temperatures of less than 150 ℃ and in ambient conditions. At the same time, a spin coating deposition method was utilized to deposit both a small molecule 6,13-bis(triisopropylsilylethynyl) pentacene (TIPS-pentacene) organic semiconducting layer and a high-k dielectric layer. The proposed OTFT devices demonstrated high electrical performances and good morphological characteristics. Remarkably, the fabricated OTFT using a high-k Polyvinylpyrrolidone (PVP) dielectric on a Polyethylene Terephthalate (PET) substrate achieved a channel length of 120 µm with saturation mobility of 6.86 × 10-1 cm2/Vs, a threshold voltage of –3.5 V, an On/Off current ratio of 106, and a subthreshold swing of 105.9 mV/decade. On top of that, this work also successfully developed the OTFT working at low operating voltage, below –5 V. Moreover, the proposed method was also utilized to establish OTFT-based temperature sensors demonstrating sensitivity up to 0.17 µA/℃. The integration of direct-write printing technology into the high-k dielectric layer offers a novel bottom up approach to fabricating organic-related devices, mainly the OTFTs, at lower processing temperatures suitable for flexible and wearable electronic applications.
Generalized electrocardiogram biometrics based on encoder representations from transformer with augmented dataset generation
(2024-10-01)
Chee, Kai Jye
Electrocardiogram (ECG) biometrics enhances security by complementing other identity proving methods, due to the inherent difficulty of falsifying an internal signal. Traditional machine learning approaches have various limitations, including issues like inadequate training data and overlooking the dependencies between enrolment and query segments. Furthermore, conventional identification classifiers face a trade-off between accuracy and adaptability to enrolment changes, often requiring retraining upon new enrolments. This research introduces Multi-database Training Examples Generation (MTEG) to generate abundant training datasets from multiple ECG databases. This research also presents the Enrolled-Query ECG Pair Feature Extractor (EQFE) to extract inter-segment dependencies of the enrolment and query segments, and Self-Attention Identification Classifier (SAIC) that considers all enrolment subjects in the identification task, while also accommodating changes to the enrolment subjects without necessitating model retraining. The incorporation of ten databases in MTEG improves authentication accuracy from 71.54% to 99.57% in the PTB Diagnostic ECG Database, compared to using a single database. Furthermore, the presence of EQFE enhances authentication accuracy from 70.94% to 98.12% in the Stress Test Database, relative to its absence. Additionally, the utilization of SAIC results in a notable improvement in identification accuracy, rising from 92.87% to 96.29% in the Atrial Fibrillation Database, compared to its absence.
Cascaded multilevel llc resonant converter with bidirectional buck- boost stage for battery applications
(2024-08)
Salah Salem Assenni Alatai
Multilevel inverters (MLIs) are widely utilised in various power electronics applications. These converters have garnered significant attention in recent years in research and industry and come in various topologies with similar fundamental concepts. This thesis designed and evaluated an integrated cascaded pair of full-bridge LLC resonant bidirectional DC-DC converters usable in varied applications, including in energy storage systems, to function as an interface between two dc voltage buses in a variety of applications. The proposed converter combines an isolated five-level cascaded H-bridge LLC (IFCHB-LLC) resonant circuit with a buck/boost circuit (Bidirectional converter BID). In this converter, the inbuilt capabilities of an LLC converter, which function as a current source and a voltage source, were exploited, resulting in the constant current (CC) and constant voltage (CV) charges while CV was implemented in the discharge stage (reverse flow). The modelling of the LLC converter was done following the first harmonic approximation (FHA) approach. Furthermore, to ensure improved efficiency of the proposed system, the passive elements of the resonance tank and isolation transformer ratio were programmed in a manner that the converter can be operated within the zero-voltage switching (ZVS) for the entire operation frequency range of (78 kHz < 𝑓𝑠<132 kHz) for all switches (S1- S8) and zero-current switching (ZCS) region for rectifier diodes. The feasibility and validity of the converter were simulated by MATLAB software and tested using a 500W prototype converter with an input voltage of 200V resulting in the highest efficiency level of 95.01%. The obtained experimental results are found in good agreement with the simulation results. Moreover, a detailed comparison between the proposed converter and other existing topologies of multi-level, resonant and bidirectional converters for battery charging in terms of control complexity, component counts, and soft-switching properties is presented. This comparison showed that the proposed converter has better performance when compared to other existing converters.
Enhanced you only look once networks for detection of printed circuit board defects and components
(2024-07)
Qin Ling
Printed circuit boards (PCBs) are becoming increasingly complicated, diminutive and delicate due to the rapid development of integrated circuit technology.Effective detection for PCB defects and components is critically important andchallenging for the PCB industry. However, current methods for PCB inspection are hardly competent for both rapid and accurate detection simultaneously. They always achieve precise detection by introducing computationally expensive operations, which are adverse to their detection speeds. Even for You Only Look Once (YOLO) networks, which are renowned for their accurate and real-time performance in object detection, it is still difficult to detect small PCB defects and components, because of the small dimensions, large scale variance, dense distribution and diverse appearances. Therefore, based on various modifications on YOLOv5, YOLOv7 and YOLOv8, three novel deep learning models, such as TD-YOLO (YOLO for tiny defect detection), SDD-Net (soldering defect detection network) and DC-YOLO (YOLO for dense component detection) are proposed respectively for rapid and precise PCB inspection. The improvements in TD-YOLO involve recomposed data augmentation, novel anchors design, the introduction of ShuffleNet block and an efficient feature pyramid network. For SDD-Net, a novel spatial pyramid pooling block, a hybrid combination attention mechanism, a residual feature pyramid network and an efficient intersection over union (IoU) loss function are implemented. For DC-YOLO, the modifications contain introducing Ghost convolution and novel C2Focal modules into the backbone, and a Sig-IoU loss. Consequently, TD-YOLO achieves outstanding mean average precision (mAP) of 99.5% and the fastest speed of 37 frames per second (FPS) for PCB cosmetic defects in high-resolution images. SDD-Net attains the highest mAP of 99.1% with the 102 FPS speed for PCB soldering defects. DC-YOLO obtains the highest mAP of 87.7% and speed of 110 FPS for PCB components. Overall, DC- YOLO is the best method of the three proposed models in terms of the detection precision, because it not only exhibits excellent results for PCB components, but also has impressive generalization ability on both PCB cosmetic defects and soldering defects.

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