Design And Implementation Of Low Passband Ripple Digital Down Converter Filter For Software Defined Radio Transceiver
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Date
2011-12
Authors
Naghmash, Majid Salal
Journal Title
Journal ISSN
Volume Title
Publisher
Universiti Sains Malaysia
Abstract
The main aim of this research is the design and implementation of the Digital
Down Converter (DDC) filter with low passband ripple and high attenuation in the
adjacent rejection and blocker requirements in the filter response for Software
Defined Radio (SDR) transceiver to decrease the power consumption and avoid the
interference in the channel. The proposed DDC filters incorporate of Remez
algorithm and Mini-max algorithm to reduce the error rate in the filter response. The
DDC filter is a combination of 5-stages Cascaded Integrated Comb (CIC) filter and
two linear phase Equiripple FIR filter (CFIR and PFIR). The passband ripple,
adjacent rejection and blocker band is developed by controlling the transition width,
filter order and weight function of the FIR filter using MATLAB and Xilinx System
Generator environment. Additionally, the transmitter and receiver baseband section
of SDR transceiver has been designed and implemented under channel noise to
verify the filter performance in the SDR receiver. The input and output signals are
analyzed and evaluated on a real time basis by translating all signals in Verilog code
and verified using ModelSim for the FPGA implementation. The simulation and
implementation results of DDC filter show that the proposed algorithms provide an
important developments of 40% in the passband ripple, 18% in the adjacent
rejection, 11% in the blocker requirements and consume less FPGA logic elements
by almost 20 % in term of slices and LUTs as compared with current design. These
results confirm the validity of the proposed algorithms and the techniques used are
promising to support the SDR requirements of wireless communication system.
Description
Keywords
Design and implementation of low passband , ripple digital down converter filter