Zero forcing equalizer design for signal integrity application
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Date
2019-06
Authors
Nur Ain Najihah Binti Tajul Anuar
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Abstract
In today’s world, communication system with high data rate usually suffers from signal degradation such as distortion and reflection. Intersymbol interference is a signal distortion that causes heavy data loss in a communication system. The presence of intersymbol interference will result in wrongly decoded data at the receiver as the receiver cannot predict the correct level of the square waveform, leading to the loss of information. Therefore, the equalizer will be used to recover the transmitted data at the receiver. A study has been conducted in removing the intersymbol interference by applying a precursor equalizer by a time reversal and use practical minimum phase filter [1]. However, the limitation is it can only combat precursor intersymbol interference. If a signal is suffering from post-cursor intersymbol interference, this method cannot be used. Therefore, the main objective of this project is to design a zero forcing equalizer for signal integrity application that mitigates the post-cursor intersymbol interference. This project analyzes the performance of zero-forcing technique to achieve a data rate of 10.0 Giga-bit per second for single-ended signal like double data rate (DDR). The simulation will be obtained using Advanced Design System (ADS) and Matlab. For the calculation to cancel the post-cursor inter symbol interference, it will be carried out using Matlab. The quality of the signal of the equalizer in this project will be analyzed using an eye diagram. In this project, two lengths of microstrip will be used which are 1 inch and 20 inches. For each of the microstrip length, one pulse response and PRBS pattern will be used as a reference to cancel the ISI. One pulse response is used because it is the only way to find out the post-cursor ISI and to carry out the zero forcing calculation before implementing it in PRBS pattern. PRBS pattern shows the level of accuracy for zero forcing calculation whether it succeeds or not. With these results, it is concluded that zero forcing equalizer is successfully designed for microstrip length of 1 inch and 20 inches using the proposed methodology.