High Frequency Signaling Analysis Of Inter-Chip Package Routing For Multi-Chip Package

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dc.contributor.authorYong, Khang Choong
dc.date.accessioned2019-04-22T06:44:24Z
dc.date.available2019-04-22T06:44:24Z
dc.date.issued2013-07
dc.description.abstractMulti-Chip Package (MCP) is becoming a customary form of integration in many high performance and advanced electronic devices. The vast adoptions of this technology are mainly contributed by the advantages for instance lower power consumption, heterogeneous integration of multiple silicon process technologies and manufacturers, shorter time-to-market and lower costs. However, the high density inter-chip I/O routing within package will presents unique signaling challenges when coupled with high operating data rate. Tackling the right issue at early design stage is essential to avoid the pitfall of redesign. Thus, with the aim to establish the design guideline to enable high performance MCP channel, this research focuses on the signaling analysis of the inter-chip I/O package routing between silicon devices in MCP. In this study, signal quality and eye margin sensitivity were evaluated from 2.5 GHz up-to 7.5 GHz. The microwave effect is found dominating the transmission line component that resulted in signal quality deteriorations. Key limiting factors such as crosstalk coupling effects, signal reflections and frequency dependent losses that caused signal quality degradations were identified and categorized from 2.5 GHz to 7.5 GHz with channel length of 3 mm to 30 mm for future MCP design considerations. Moreover, various low power passive signaling enhancement techniques i.e. equalization and termination to mitigate the signal integrity challenges of the high speed on-package inter-chip channels has been analyzed.en_US
dc.identifier.urihttp://hdl.handle.net/123456789/8079
dc.language.isoenen_US
dc.publisherUniversiti Sains Malaysiaen_US
dc.subjectHigh Frequency Signalingen_US
dc.subjectMulti-Chip Packageen_US
dc.titleHigh Frequency Signaling Analysis Of Inter-Chip Package Routing For Multi-Chip Packageen_US
dc.typeThesisen_US
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