Studies Of The Effect Of Post Deposition Annealing To The Ceo2 Thin Film On P-Type Silicon And N-Type Silicon Carbide Substrates
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Date
2011-10
Authors
Chuah, Soo Kiet
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Publisher
Universiti Sains Malaysia
Abstract
Cerium Oxide (CeO2) thin film has been deposited on silicon (Si) and silicon carbide (SiC) substrates using a radio frequency magnetron sputtering technique. The effect of post deposition annealing at different temperatures (400, 600, 800 and 1000oC) in argon (Ar) ambient for 30 minutes has been investigated on p-type Si and n-type SiC substrates. The thickness of the CeO2 thin films on Si and SiC substrates are in the range of 30 to 40 nm. Field emission scanning electron microscopy and atomic force microscopy show that both CeO2 thin films on Si and SiC substrates are free of physical defects and the root mean square surface roughness are decreasing as the annealing temperature increases. X-ray diffraction (XRD) pattern indicates the occurrence of CeO2 phase with four diffraction orientation [(111), (200), (220), and (311)] with the preferred orientation of (200) for all the investigated samples in CeO2/Si system. For CeO2/SiC system, XRD reveals the presence of CeO2 phase with two diffraction planes [(111) and (220)] with preferred orientation of (111). Capacitance-voltage and current-voltage measurements are performed to investigate the electrical properties of Al/CeO2/Si and Al/CeO2/SiC capacitors. The result shows that the CeO2 annealed at 1000oC on both Si and SiC substrates have the lowest leakage current and the highest dielectric breakdown field.
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Keywords
The effect of post deposition annealing , to the CeO2 thin film on p-type silicon