Passive equalizer design at 8gbps data rate for signal integrity application
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Date
2019-06
Authors
Nasruddin Bin Abdul Rauf
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Abstract
Modern processors are capable of working at a very high frequency with the advent of technology scaling. However, memory limits the overall speed which can distort transmitted signals, worsen eye diagrams, and attenuate signal amplitudes. Also, these impacts make digital signals and their energy smearing over multiple bit positions as known as jitters, and cause the phenomenon of inter-symbol interference (ISI) in digital signal transmissions. One of the differences between transmission lines and the conventional electric circuit theories is that lump circuit components are used with a low frequency. Most equalizers use circuitry that actively boosts or cuts the sound in the various bands using electronic feedback techniques which can (and often does) introduce audible "ringing" in the circuitry. Passive equalizers on the other hand work by already cutting the sound in all frequency bands to begin with, using simple, unpowered, passive electrical components like resistors, capacitors and inductors. Therefore, on such an equalizer, when "boost" a frequency, it is not really boosting it at all, eit just allowing it to seep through unhindered by the passive circuitry. Equalizers often work in exactly this way. Generally, if the dimensions of a circuit components are shorter than the guided wavelength of its associated circuit device, it is good to use electric circuit theory to measure the effect on the device. Equalization is a powerful technique to restore distorted signals, which employs passive component as an equalizer applied to wired transmission channels. In this project, technique used for design an equalizer is to design passive equalizer. Passive equalizer consists of resistor, inductor and capacitor. For first setting, proposed equalizer is a series RC equalizer. For different topology with different settings, equalizer designed is parallel RC equalizer. Software tools to run this simulation is Advanced Design System. This studied shows a results which for the first setting for 95 ohm successfully meet the specifications. From the simulation, it shows a better results compare to design which has not been implemented with equalizer. For different topology, this design cannot use the same settings as the 95 ohm. So different settings has been set for different topology. The elimination of Inter Symbol Interference is achieved through equalizing circuits that compensate the channel by introducing a frequency response that is the inverse of the one of the channel, to make the overall frequency response as flat as possible. Sometimes there is the need to design equalizing circuits without the knowledge of the amount of distortion that is introduced by the channel. Passive CTLE is known for low power consumption and small die area are equally important when silicon implementation issues are taken into account.