Area optimization of pump clock layout design
Loading...
Date
2019-06
Authors
Chin, Vern Shen
Journal Title
Journal ISSN
Volume Title
Publisher
Abstract
In this state of the art digital and communication world, the pump clock or charge pump plays the important role in the modern hardware device and portable device, especially smartphone. Pump clock or charge pump is the vital fundamental in driving the analog integrated circuit design industry. The area and cost optimization are the two main consideration for the pump clock layout design. Flashback to past few years, the chip size is scaling down but with the same or improve functionality is a demand for the electronic market. There are many ways to optimize the area of the pump clock layout design such as sharing source-drain, sharing guard ring, sharing well and fingering techniques. By using these techniques in the floor-planning process, all the device in pump clock layout is rightly placed and optimized most of the area. With the compact area of the layout, this will increase the cost saving for the chip or die. The desired targeted designs are to obtain the compact area, lower cost, errorless in design rule checking (DRC), errorless in layout versus schematic (LVS) and errorless in latch-up check of the pump clock layout design. In this thesis, the analysis result will be carried out in terms of the total area optimized, total cost saving, and resistance optimized by IR drop analysis. Besides, the verification result will be obtaining to ensure that the quality of the layout design is good. The total area optimized is presented in three parts. First part is about the total area optimized by using the two techniques. Second part is total area optimized in terms of comparison between the pump clock layout design with PR boundary and pump clock layout design with Cypress Semiconductor. Last part is total area optimized in terms of comparison between each stage of the floor-planning. Finally, the pump clock layout designed has the total area of 14916.9934(μm)2 which optimized 322.6502(μm)2 of area by using the area optimization techniques. Besides, the cost saving is 1.0083×10−5 USD. In conclusion, the design objective is met since it fulfilled all the requirement. In conclusion, the design objective is met since it fulfilled all the requirement.