Free Level Threshold Zone (FL TZ) Logic For mixed Analog - Digital closed loop circuitry
| dc.contributor.author | Nazem, Alireza | |
| dc.date.accessioned | 2016-10-06T03:22:04Z | |
| dc.date.available | 2016-10-06T03:22:04Z | |
| dc.date.issued | 2008 | |
| dc.description.abstract | Researchers have always look for ways to improve the interfacing method between the Analog and Digital domain. Undeniably, the last few decades have witnessed the development AD/DA conversion techniques for various applications. Nevertheless, there still exist rooms for further progress and development of this important area. Current AD and DA modules occupy space (surface), consume power, cause transmission delay and sometimes introduce data loss as well. The conventional techniques for ADIDA conversions have yet to be improved specially due to transmission delay and data loss by the cause of sampling. In this project, the focus is on a unique method that ignores the need of conventional ADIDA converters in a sequential logic processor or MCU by making use of non-Schmitt Input initialized port(s) which is(are) directly attached in a closed-loop circuit to read from and control analog device(s). The basic of Free Level Threshold Zone (FL TZ) Logic relies on the unstable generated oscillation of a digital output where the program-referred non-Schmitt input, is detecting (0) and (1) values at the stage of threshold voltage. Another concept of FL TZ may be considered when an internal Pulse Width Modulation (PWM) is initialized on the background mode and controlled by FL TZ due to the input detections. FLTZ initially tested and developed using PICTM microcontrollers. The outcome successes lead to an introduction of FLTZ in Switch Mode Power Supply (SMPS) device by direct use of an MCU in a closed-loop circuitry. FL TZ technique addresses the way of minimizing the blocks in an Analog-Digital architecture over 20%, as well as power consumption (>10%), data loss, power loss (>10%), cost, chip size over 10% and transmission delay in MCU architecture not only by ignoring conventional ADIDA converters, but also providing a reference voltage. As the effect of FL TZ is related to the driving program codes, thus dependent to the speed of the device (clock frequency), FL TZ creates effective solutions for various kinds of applications such as VCO for communication system, and automotive speernuise. | en_US |
| dc.identifier.uri | http://hdl.handle.net/123456789/2684 | |
| dc.subject | Improve the interfacing method | en_US |
| dc.subject | Between the Analog and Digital domain | en_US |
| dc.title | Free Level Threshold Zone (FL TZ) Logic For mixed Analog - Digital closed loop circuitry | en_US |
| dc.type | Thesis | en_US |
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