Development And Implementation Of A New Technique For BERT (Bit Error Rate Tester) Using SDR Platform
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Date
2011-10
Authors
Hamza, Ekhlas Kadhum
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Publisher
Universiti Sains Malaysia
Abstract
Hardware/Software (HW/SW) co-design approaches become prospective choice due to its real time operation since these solutions are so flexible that cover extensive complicated systems and reduce time from design to market. Hybrid digital signal processors (DSPs), field programmable gate arrays (FPGAs) and general-purpose processors (GPPs) designs are viable solution for software defined radio (SDR) technology. This thesis demonstrates a practical design and implementation procedure for building a useful, efficient and flexible model of a bit error rate tester (BERT) on physical layer for UHF-band of the digital transceivers by using new architecture in Multi-Core Software-Defined Radio Platform. A BERT for a digital receiver involves modelling a transmitter and noisy channel, as well as the receiver itself. Typically, BER is calculated using simulations, which are very time-consuming and not automated in real time. In order to solve this problem, this thesis presents a scheme for BER testing using small form factor (SFF) SDR .This research presents the development of the proposed digital transceiver on the SFFSDR platform in three steps. The first step is the simulation level, which uses the Xilinx System Generator block and Lyrtech block. The second step involves the design of the Hardware-in-the-loop (HIL) Co-simulation and the implementation on FPGA hardware-modeling tool. The third step describes the design based on Real Time DSP/ FPGA hardware. The proposed implementation has a random number generator as data source. This data is modulated and up-converted before it is fed to the RF module of the SFFSDR .The received signal from the RF is later down-converted and demodulated and fed to the comparator which calculates the number of errors by comparing it with the transmitted bits. Two types modulation (i.e. FSK and BPSK) are used to test proposed for real implementation.
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A new technique for BERT , using SDR platform