Multicarrier Frequency Hopping Spread Spectrum Techniques With Quasi-Cyclic Low Density Parity Check Codes Channel Coding
dc.contributor.author | Yahya, Abid | |
dc.date.accessioned | 2018-06-06T06:35:23Z | |
dc.date.available | 2018-06-06T06:35:23Z | |
dc.date.issued | 2010-04 | |
dc.description.abstract | This work presents a new proposed Multicarrier Frequency Hopping Spread Spectrum (MCFH-SS) system employing Quasi-Cyclic Low Density Parity Check (QC-LDPC) codes instead of the conventional LDPC codes. A new technique for constructing the QC-LDPC codes based on row division method is proposed. The new codes offer more flexibility in terms of high girth, multiple code rates and block length. Moreover, a new scheme for channel prediction in MCFH-SS system is proposed. The technique adaptively estimates the channel conditions and eliminates the need for the system to transmit a request message prior to transmitting the packet data. The ready-to-use channel will be occupied with a Pseudonoise (PN) code and use for transmission or else, it will be banned. The new QC-LDPC codes are compared with other well established LDPC codes. The Bit Error Rate (BER) performance of the proposed QC-LDPC codes is evaluated and compared for short to longer block lengths with different code rates and fractional bandwidth,ρ . The new QC-LDPC codes show good BER performance as compared to the renowned Mackay and PEG codes for given values of / b o E N by 0.15 dB and 0.1 dB at a BER of10−7 respectively. The proposed QC-LDPC codes are implemented on FPGA chip using Xilinx Spartan-3E development board. The results obtained for the hardware implementation of the proposed QC-LDPC codes with partial-parallel architecture accomplishes a throughput of 111.6 Mbps. Analysis of the hardware implemented QC-LDPC codes reveals that the new codes require less memory space, thus decreases the hardware complexity. The new QCLDPC codes are employed in the proposed MCFH-SS system as forward error correction (FEC) codes. The performance of the proposed MCFH-SS system at diversity level 4, outperforms MCFH-SS system (without channel prediction scheme) with 0.5 dB gain at ρ =1, when both systems are coupled with the proposed QC-LDPC codes. It is shown from simulation results that for 40 users at 0 / b E J of 5 dB, the proposed MCFH-SS system and fast frequency hopping spread spectrum (FFH-SS) system have BER of 10−6 and 10−4 respectively. The significant performance enhancement has been observed for the same number of users (40) at high 0 / b E J of 50 dB that the proposed MCFH-SS system has BER of 10−7while FFH-SS system with BER of10−3 . Simulation results show that the proposed MCFHSS system achieves considerable advantage over the FFH-SS system when the systems are used under similar conditions. The overall proposed system is implemented on a hardware platform comprised of a communication development kit that is interfaced with Xilinx development board. | en_US |
dc.identifier.uri | http://hdl.handle.net/123456789/5682 | |
dc.language.iso | en | en_US |
dc.publisher | Universiti Sains Malaysia | en_US |
dc.subject | Multicarrier Frequency Hopping Spread Spectrum | en_US |
dc.subject | system employing Quasi-Cyclic Low Density Parity Check | en_US |
dc.title | Multicarrier Frequency Hopping Spread Spectrum Techniques With Quasi-Cyclic Low Density Parity Check Codes Channel Coding | en_US |
dc.type | Thesis | en_US |
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