Pusat Pengajian Kejuruteraaan Elektrik dan Elektronik - Monograf

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Pengelog data untuk multi-meter digital
(2004-03-01)
Lai, Thiam Hee
A normal multimeter is used to measure the voltage and current of certain circuits and also the resistance across certain lines. As the world of electronics evolves, multimeter evolved from analog to digital. But how to incoporate the data measured from a digital multimeter into a computer? The answer to the above question is the datalogger of the digital multimeter. The datalogger is connected into the digital multimeter so that the data measured can be stored into its memory. Before the era of datalogger, some latest digital multimeters have serial interface ready. By linking the interface to the computer, one can get the recording of oscilloscope for slow signals. On the downside, the computer has to be present at the measurement location, and left running all the time. Besides, the digital multimeter occupies the serial port during the entire measurement. These disadvantages certainly points to wastage of computer resources. The datalogger designed will be free of these disadvantages. It can automatically captures the discrete measurement values supplied by the digital multimeter and puts them into permanent storage. When the need arises, the contents of the datalogger will then be downloaded into computer for data manipulation.
Rekabentuk penyalun dilektrik 10 ghz yang mempunyai ayunan penimbal
(2005-03-01)
Wan Abdullah, Wan Mohd Afindi
This project is to design a dielectric resonator oscillator at frequency of 10 GHz. To make this oscillator, a dielectric oscillator is connected to an amplifier to create a positive loop feedback. In the design of this oscillator, an oscillator circuit was developed and tested to determine whether the citcuit oscillator or not. The amplifier circuit also has been designed and the gain was set to be greater than zero in order to ensure the circuit will have the desired output. Both of these circuits was be combined to create an oscillator. The circuit was tested again to ensure that the value of Gain from the circuit satisfied the specification and need. In designing the circuit layout, two circuit boards have been developed to test the puck that is being used. The first circuit board is using only one line fabrication and the second circuit board is using two lines fabrication. This circuit board was connected to the network analyzer to measure the frequency response of the puck.
Investigate instability behaviour in high power ldmos power amplifier
(2005-03-01)
Ab Rahman, Ida Idyuni
In this thesis the models of LDMOS power amplifier was been investigated using Advanced Design System (ADS) version 2004A software from Agilent Technologies for operation below 1 GHz frequency range. There are two models considered in this project. Both of the models were provided by Motorola. The two models are RD01MUS1 and RD07MVS1 based on a 59 mil LDMOS transistor using type of FR4 PCB Board. Large signal simulations of both models have demonstrated results, which lead to the conclusion that, these models cannot be efficiently utilised for design of input and output matching networks using Unilateral value for Conjugate Matching. However, there are other matching applications; Load Line Matching and Load Pull Analysis that can be used that have not been explored yet by the researcher due to time constraint. Hence, it is important to take into account during new processes of LDMOS as well as to improve the CAD model. The final conclusion regarding LDMOS cannot be made just based on these simulation results, since they are not in accordance with the published ones. The next step should be aimed at improving the model and further investigation of LDMOS to prove their ability to operate with optimum efficiency in above1 GHz frequency range.
Design and analysis of cmos rfic if lowpass filter 1.9ghz range for cdma applications
(2005-03-01)
Loo, Kwang Tatt
In this century, the world’s is starting to bloom by the wireless communication. 3rd generation (3G) communication requirement is a must in the recent market demand and 4th generation (4G) is on its way. Portable wireless communication systems require many complex transceiver components. Many design techniques have been proposed for monolithic filters as they are key components of the transceiver systems. Since cost, reliability, performance, size and power consumption are main concerns of these components, they should ideally be realized as integrated circuits wherever possible. More challengingly, the whole system is implemented as of system on chip (SOC), which also known as radio frequency integrated circuit (RFIC). Due to high frequency, radio frequency (RF) filters are often discrete components rather than on chip. But, analog filter is preferred in the design of high-performance electronic circuits for the intermediate frequency (IF) stage with low cost and low power consumption for high-speed applications. At baseband, filters are mostly digital filter due to programmability. In general, filters can appear in three places: 1) RF stage : RF filters are mostly discrete components. 2) IF stage : IF filters are analog integrated components. 3) Baseband : Digital filters are typically applied.
A stepper motor design optimization using
(2005-03-01)
A stepper motor design optimization using
In this project, the design optimization of a stepper motor is presented. In general, the area of study can be divided into motor principles and construction, design methods, and digital control experiments. Theory is taught in classroom lectures, whereas control methods are learned primarily in laboratory situations. Instruction on motor design, however, is usually limited to the study of motor construction, with practically no laboratory time spent on the actual fabrication of motors. The production process, including material processing and winding, would take up too much time and expense. There is a need to fill this void in the area of small-motor design, and develop a program using Genetic Algorithms (GAs) as an approach to achieve optimization. The aim of optimum design in this project is to minimize the volume, weight and cost of stepper motor while keeping constraint variable at the desired value. In order to achieve the optimum design, Genetic Algorithms (GAs) approach has been applied. GAs approach is selected because it is a powerful and broadly applicable stochastic search and optimization techniques that works for many problems that are very difficult to solve by conventional methods. The design optimization procedure of a stepper motor is described in this project. A C++ program has been successfully developed based on the GAs by using the GAs library. This GAs library is a C++ library that contains tools and built-in components for using GAs to minimize the fitness function. In this project, the program that has been developed is run to get the optimization result with Microsoft Visual C++. In order to obtain better results from the program, some of the parameters have to be changed. These include GA parameter that is number of generation and size of population and penalty factor. From the result, it is shown that the objective function is achieved while keeping other constraint function at desired value. This project and successful results have proved the suitability of GA for design optimization of electrical equipment. It is shown that GA can be used to solve complex problems within a short period.
Design and analysis of cmos based rfic bandpass filter (bpf) for 1.9ghz range for cdma applications
(2005-03-01)
Ngoh, Say Kit
The rapid development of wireless applications has created a demand for low-cost, compact, low-power hardware solutions. This demand has driven efforts to realize fully integrated, “single-chip” solution systems. While substantial progress had been made in the integration of many RF and baseband processing elements through the development of new technologies and refinements of existing technologies, progress in the area of fully integrated filters has been limited due to the losses (low Q) associated with integrated passive elements in standard IC process. The work in this report focuses on the design and analysis of CMOS based RFIC bandpass filter for center frequency of 1.90Hz. The entire design and analysis of the filter circuit have been carried out by ultilizing Cadence IC Design Tools (version 5.033). This report present a methodology for designing a Q-enhanced bandpass filter with active negative resistance generator circuitry to compensate for the filter losses due to the low quality factor of monolithic spiral inductors. The first phase of this work focus on the design and simulation of an ideal, fully integrated second order Butterworth bandpass filter (with -3dB bandwidth of 200MHz centered at 1.9GHz, corrensponding to the CDMA2000 Standard) ultilizing Cadence IC Design Tools with Silterra 0.18um Design Kit. The ideal bandpass filter which based on the paper work calculation is first constructed by using Silterra SMCMOS ideal component and the simulation results are observed. The ideal circuit is then simulated by using Silterra RF component (which include all parasitic effects) to show the actual filter performance. In the second phase of this work, a FET-based active negative resistance circuit is developed and being added into the bandpass filter circuitry to compensate the filter loss. With features of Cadence IC Design Tools, the filter is analyzed and optimized to obtain the best response. The best filter design achieves ≈ 0dB of passband gain or insertion loss while consuming 8.8mA of current from a ± 1.8V source (31.69mW). The filter provides more than 10dB of rejection at 1.5GHz and 2.5GHz. In the filter passband, the noise figure is 5.25dB and input return loss is -20dB. The filter response only suffered a minor frequency shift for a wide range of operating temperature. The bandpass filter has potential application as RF filters in CMOS integrated transceiver designs.
Mengawal kelajuan motor aruhan satu fasa menggunakan pwm berdasarkan fpga
(2005-03-01)
Roslan, Rosmaiza
Nowadays, design technology is being one of the most important asset in order to increase the technology standard in our country. So that, designing induction motor control speed circuit using FPGA is one of the new design method. Motor is one of the most important devices we used today in industry with this circuit design, it will help us to handle all those machine in industry. This speed control circuit is using PWM( Pulse Width Modulation ) method. There are many ways to produce PWM. One of them is by using FPGA. This project is developed to design PWM signal that will control the speed of the ac induction motor by using xilinx.
Data logging hardware systems
(2005-03-01)
Wan Salleh, Wan Mohd Shukri
Secara umumnya, Sistem Perolehan Data merupakan satu sistem peralatan elektronik yang dibina bertujuan untuk merekodkan data daripada persekitaran luar dalam jangka masa tertentu. Data yang direkod adalah ditentukan oleh pengguna, kebiasaannya merupakan parameter fizikal seperti suhu, kelembapan relatif, tekanan, voltan, aras air dan sebagainya. Kesemua data ini berkemungkinan terdiri daripada data analog atau digital, yang mana bergantung kepada jenis parameter tersebut. Sistem ini dibina bertujuan mencerap data-data yang berkaitan dengan pergerakan sebuah robot dalam air. Data tersebut ialah suhu persekitaran, arah kedudukan, sudut sendeng robot, tarikh dan waktu pencerapan data. Kesemua data ini dicerap dengan menggunakan pengesan masing-masing iaitu pengesan suhu LM35DZ, pengesan Memsic 2125 bagi mengesan sudut sendeng dan kompas pengesan arah elektro-mekanikal. Pengesan suhu LM35DZ memberikan keluaran dalam bentuk voltan analog kepada mikropengawal, manakala pengesan pecutan Memsic 2125 dan kompas pengesan arah elektro mekanikal memberikan keluaran dalam bentuk digital kepada mikropengawal.
Sistem paparan kesihatan menggunakan borland c++ builder
(2005-03-01)
Karen Then, Miaw Wah
This project is implemented to develop a user-friendly health indicator system. The system is a graphical user interface (GUI) built using the Borland C++ Builder software. The system is to assist physicians and other medical personnel to monitor a patient’s vital signs namely the patient’s blood pressure, body temperature, oxygen level concentration in blood and heart beat rate by just glimpsing at one screen instead of having to scrutinize four separate equipments in order to get readings. In general, the system is made up of three main modules which includes; a search module, real-time monitoring module and recovery module. The search module encompasses a box to key in the patient’s name or ID and a search button to locate the patient’s file. The real-time monitoring module shows the current measurements of the health parameters on the screen. Each parameter has an alarm that will flicker should any abnormalities occur. In practical, this system should be hooked up to hardwares that interpret signals acquired from the patient and measurements are stored in a source file. Thus, this system is also implemented to retrieve the measurements from the source file and present it on the screen in numerical and graphical form.
Pengenalpastian parasit malaria
(2005-03-01)
Syed Zainal Abidin, Syed Muhamad Hatmi
In the medical field we have the technicians to analyze all the data acquired from test sample. All of this sample will then sorted and analyze for any symptom of diseases. So, for a human eye to do this work for hours and hundreds of sample is very tedious and tiring. Also cases of error in diagnosis will commonly occur. Lab technician need to spend at least half an hour to scan each slide and this is very time consuming. Sensitivity of the human eye is only about forty percent. Even so, technicians can read not more than 20 slides per day because this leads to eye fatigue and incorrect reading. As the solutions, the development of software to analyze each sample of blood is needed to overcome this problem. The software will work to scan the entire sample according to the symptom or criteria of malaria parasites. For this project, the criteria’s and characteristic of the malaria parasite must be considered to identify whether the sample of blood is affected by the malaria parasite. After the parasites have been detected, the amount of the parasite will be count to determine the total amount of malaria parasite in the blood sample. This software will act like any human technicians or analyzer would do. This is done by analyzing the sample using the technique of image processing which will be implementing in a C++ Builder-object oriented programming. With the use of the system, it should reduce any error in diagnosis. Also we can analyze much more sample than any average human eye would do.
Design of power amplifier (pa) front-end transmitter for cdma application at 900mhz using 0.18 micron cmos technology
(2005-03-01)
Zahari, Muhamad Iskandar
Recent efforts in the design of integrated circuits for RF communication transceivers have focused on achieving higher levels of integration by including more and more analog functional blocks onto a single silicon CMOS chip. One of the final blocks that have yet to be successfully integrated is the power amplifier. The power amplifier is the final functional block in the transmit path and its function is to amplify the signal to be transmitted to the required transmit power level. In general, power amplifiers are difficult to integrate in CMOS because of technology limitations that severely limit the efficiency of the power amplifier. This thesis describes theoretical analysis and circuit techniques for the design and implementation of RF Class C power amplifier in CMOS technologies. There are very few methods exist for designing Class C power amplifier in the past, much of the design process has been empirical. The theoretical work in this thesis attempts to describe a method for designing a Class C power amplifier in CMOS without resorting to blind use of a circuit simulator. A 900MHz CMOS power amplifier was designed using Silterra 0.18µm RF MOSFET. This design is simulated using Cadence Design tool. In this simulation, the peak efficiency of the power amplifier was 37.7%. The power amplifier did meet the spectral mask requirements of CDMA (Code Division Multiple Access) cellular communications system for which it was designed. The power gain that had been achieved is 34.74 dB and meets the power amplifier specification for CDMA application.
Development of web-based e-learning on design of experiment technique; case of randomized complete block design (rcbd)
(2005-03-01)
Muhd. Nordin, Nor Ilyana
In research and development, often half of the resources are spent on solving optimization problems. With the rapidly rising costs of making experiments, it is essential that the optimization is done with as few experiments as possible. This is one important reason why Design of Experiments (DOE) is needed. In certain field there are circumstances in which the experimenter would like to screen factors to decide which are the most important. In these situations the engineering model of DOE is useful. These all signify the importance of DOE. Randomized Complete Block Design (RCBD) and Latin Square Design are DOE blocking techniques. This project has a vision of educating its viewer through a different environment of learning the subject of RCBD and Latin Square Design. Materials are explored from various resources that can be found in books and in the internet just to ensure the webpage provide sufficient and refer to reliable information. It proved that the materials included in the webpage combines all resources so that the webpage is ensured to cover entire concept behind both topics. With interactive links to relate one slide to the other, viewers are directed clearly from one page to the other until they have covered the whole topics in RCBD and Latin Square Design that stated in the research scope. Besides, there are also sections to test the understanding of the viewer that are named after “Do It Yourself”. In this section, complete solutions are provided for each problem, so that the viewer can check their solution with the solutions provided in the webpage. Other than learning, there are also slides provided for relaxations that are named after “Take 5”. These slides provide refreshment for viewers because its contents can lighten up their mind. Moreover, the overall structure of the webpage is well organized and viewers are ensured not to getting lost while surfing the webpage. The whole webpage design, development and its content are arranged in a way that is hoped to facilitate and add up to viewers’ awareness of the concept behind the application of RCBD and Latin Square Design. Above all, the webpage is expected to give new and clear lessons for those who are not familiar with the subject and also add up to current knowledge of the subject for those who familiar with the subject. It is also hoped that the webpage can be recommended as one of the useful resources for RCBD and Latin Square Design.
Rekabentuk penguat hingar rendah (lna) cmos beraruhan merosot bebezaan penuh untuk penerima wcdma
(2005-03-01)
Law, Eng Hui
A 2.1 GHz low noise amplifier (LNA), intended for use in a Wide-band Code Division Multiple Access (WCDMA) receiver has been implemented in 0.18μm RF process. The amplifier provides a forward gain (S21) of 11.42dB with a noise figure of only 1.7dB and drawing 12.66mA from a 1.8V supply voltage. The 1dB-compression point of the LNA is -9.82dB. In this thesis, detailed analysis of the LNA architecture will be presented. The LNA employed an inductive source degeneration topology, that is, a degenerative inductor is used to provide 50Ω input impedance matching. An advantage of this method is that unlike other methods, it does not bring with it the thermal noise of an ordinary resistor because a pure reactance is noiseless. This LNA uses differential architecture rather than single-ended architecture to provide better common-mode rejection ratio. The main problem faced in the project was to obtain a 50Ω input and output impedance while maintaining the gain to be in the range of 10dB to 15dB. This gain specification is to ensure that the LNA provide enough gain but not too high as to avoid nonlinearity that can cause distortion. LNA should not consume too much power to have good portability. Finally, the performance of the designed low noise amplifier meets all of the specification.
Sistem pemprosesan imej perubatan
(2005-03-01)
Khalid, Rohaida
Breast cancer is one of the main causes to women death nowadays. Medical specialist uses mammogram and ultrasound screening to detect and identifying the breast tumour. Cervical cancer is second causes to women death. Pap test is used to detect the biological changes of cervical cell. However, sometime medical specialist faces difficulties in analyzing the mammogram, ultrasound and Pap smear images. Medical images, which are analyzed by Radiologist and Patalogist are normally affected by unwanted noise and blur such as blood and sometimes the images are too dark or too bright. These factors contribute to error diagnosis or screening. Therefore, project proposes “Medical Images Processing System” using Borland C++ Builder version 6 to increase the problems. This user-friendly system is developed to improve the weaknessess which occur during the medical images processing. Image processing techniques such as filtering are provided in the system, contrast enhancement, boundary segmentation and edge detection. The results show that the proposed succesfully improved the tumour contrast, segmented the tumour, detected the tumour edges and reduce unwanted noise of the medical images.
Pembangunan aplikasi sistem pencerapan data berasaskan sistem pelantar linux
(2005-03-01)
Mustafa, Anuar
This project is about the development of an application for data acquisition by using Linux as the platform. Linux is used as a platform to develop applications on data logger, data communication and the analyse of data. The development of these processes is by using C programming language as the main programming. Other than that, some other programs in the Linux is used to help in the development of this data acquisition. The objective of this project is to analyse data on a real-time system. In other words, the development of this project is to create an application on data acquisition which can be connected between two computers by using Linux as the main platform. Linux is being used in conjunction with the widely used of Linux operating system in modern industries other than Windows operating system. The project that being developed can read a sequence of data, process the data received and save them in a file. This simple data acquistion system is a real-time system which consists of data collecting from a data generating simulation process, the serial communication between two computers, the data processing and the output storage in the computer.
Development of a pressure-based typing biometrics system for user authentication
(2005-03-01)
Loy, Chen Change
Password authentication is the most prevalently used identification system in today’s cyber world. In spite of the popularity of this approach there are many inherent flaws. The password plays the role as the key to a lock; anyone who has it can gain successful access. Additionally, passwords can be easily cracked, guessed, stolen or deliberately shared. To minimize the risk of intrusion, keystroke dynamics can be used to complement this popular authentication method. As the name implies, it is an automated biometric method that analyzes the way a person types on a keyboard. There have been a lot of studies on using keystroke timing characteristics to verify the identity of a user. In this project keystroke pressure (the amount of force exerted on each key pressed) was employed, and its performance was compared with that of the conventional keystroke timings-based technique. The project also investigated the use of combined keystroke pressure and latency for the identification process. In order to measure the forces exerted during typing, a pressure-sensitive keyboard system was developed. A user interface that simulates actual login environment was used to collect data from 100 users. All users were requested to enter the same password. Three different classification methods were applied, namely Logistic Regression (LR), Multilayer Perceptron (MLP), and Fuzzy ARTMAP (FAM) neural networks. The results were very encouraging, with a maximum accuracy rate of 93.9% achieved by using FAM. Keystroke latency gave better results than keystroke pressure, but using both techniques together yielded the best results, with False Acceptance Rate (FAR) of 0.87% and False Rejection Rate (FRR) of 4.4%. The experimental results demonstrated that the proposed methods are promising, and that the keystroke pressure is a viable and practical way to add more security to conventional typing biometrics authentication system.
Pembangunan kawalan suai dalam-talian untuk sistem kawalan kelajuan motor dalam matlab melalui basic stamp
(2005-03-01)
Rifin, Rozi
This project presents a Local Output Local Recurrent Globally Feedforward Neural Network (LOLRGF) for real time control implementation which is DC motor speed control. The on-line indirect adaptive control scheme is developed and neural network is used as compensator in the closed loop system to control nonlinear processes. The LOLRGF neural network was trained using Recursive Prediction Error (RPE) algorithm in order to output process follow the behavior of set point tracking beside to minimize an offset as small as possible. A continuously stirred tank reactor (CSTR) is used to develop, modeling and designing neural network compensator in simulation to determine the best output process according to network size, learning parameters and network connection. The DC motor speed control system will be adapted in the model to substitute CSTR process and observation regarding to output system behavior are implemented for real time application. In this investigation, MATLAB/SIMULINK software was used in control schemes development, modeling, analysis and design. This software also acts as controlling medium for DC motor speed control system which use Basic Stamp 2 as microcontroller.
Low bit rate speech coding using tms320c6416
(2005-03-01)
Mahamad Haniffah, Mohamad Habib
The title of the project is Low Bit Rate Speech Coding Using TMS320C6416 DSP Processor. The scope of this project is divided into two main parts. Part one involves the study of the TMS320C6416 DSP processor. My task was to understand the architecture of this board and complete the tutorials in Code Composer Studio (CCS). The second part is concerned with the sampling of speech signal (analog signal) at different sampling frequencies and to study its effects on the quality of the reconstructed speech signal. Initially MATLAB and SIMULINK were used to sample the speech file and to study the effect of variation in sampling frequency on the quality of the speech signal and its waveform. Later, the sampling process is implemented in real time using the TMS320C6416 DSP Processor. Three sampling frequencies were chosen which are 8000 Hz, 4000 Hz and 2000 Hz. The results were divided into two sections; before real-time implementation and after real-time implementation. The comparison of the quality of the sampled audio signal was carried out for the three sampling frequencies as mentioned earlier. Two methods were used to measure the quality of the reconstructed audio signal. First, fifteen students were chosen to rate their score for the quality of the reconstructed signal. The score range was from 1(bad) to 5(excellent). Secondly, scope was used to display the waveform of the original and reconstructed signal. The results showed that the quality of the sound degrades from 8000 Hz to 2000 Hz.
Design of up-conversion mixer front end transmitter for cdma application at 900mhz using cmos technology
(2005-03-01)
Tan, Wee Chuan
This report included design, and simulation results of up conversion mixer that operate at LO frequency 798 MHz. System and circuit design had been carried out with the aid of software program Cadence. Two steps up conversion mixer is a type of mixer that combines a single side band mixer and a double side balanced mixer to perform two steps up conversion process. First part of mixer will convert IF input signal at 40 MHz to 572 MHz by multiplication with LO signal at 532 MHz. The output of mixer part one consists 2 spectrum frequency at 572 MHz and 492 MHz. A Band pass filter is needed to filter the spectrum on 492MHz, the output signal after filtering process by band pass filter is at 572MHz. The output signal will become the input signal for mixer second part. Second part of mixerwill convert the input signal at 572MHz to 838MHz by multiplication with another LO signal at 266MHz. The detail circuits design is discussed in chapter 5 and performance for each part of the mixer system are tested and measured in cadence. The results are listed in Chapter 6.
Elektronik kuasa dalam aplikasi pengecasan kapasitor
(2005-03-01)
Nik Ramli, Nik Izudin
This project is to design a power electronics circuit that can be used in capacitor charging applications. The circuit is called a Half Bridge Series Loaded Resonance Converter. The function of this circuit is to supply resonance dc power. This circuit is act like a transformer which can step down an input dc voltage until the output voltage is less than half of the input voltage. For this project, the circuit using an input voltage of 30V. Analysis have been done using PSIM software. From PSIM simulation, we know that the output voltage produced depends on resonant frequency and switching frequency. Circuit operation mode will be effected if there is some changes in switching frequency. There are two modes of circuit operations which are continuous and discontinuous mode. Discontinuous mode occured when switching frequency is less than half of resonance frequency and continuous mode occured when switching frequency is more than half of resonance frequency. From the simulation of discontinuous mode, it shows that the output voltage is 5V. While for the continuous mode the output voltage is 12V. We have already know that when switching frequency is high, the output voltage produced is also high but it is limited until half of the input voltage. The designed switching circuit is using a PWM technique to control the MOSFET.

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