Publication: Implementation of fpga based encryption chip using vhd - data encryption standard (des) algorithm
Loading...
Date
2006-05-01
Authors
Lim, Mui Liang
Journal Title
Journal ISSN
Volume Title
Publisher
Abstract
Cryptography has a long and fascinating history. Traditional Encryption Algorithms are implemented in software base because of the complexities involved in the operations. The hardware based of encryption chip become realizable with Field Programmable Gate Arrays (FPGAs). There are many researchers used Data
Encryption Standard (DES) Algorithm to implement in FPGAs. The purpose of this project is to implement FPGA Base Encryption Chip using DES algorithm. Throughout the project, the suitability of the implementation DES algorithm in FPGA will be investigated. The first stage of this project is to understand the algorithm flow of the DES. In second stage, the system is described using Very High Speed Integrated Circuits hardware description language (VHDL). In third stage, compilation and simulation for source code verification purpose is done to yield the correct output by using Altera Quartus II 5.0 software. Result shows that DES algorithm can be implementing in Altera UP2 Board. The final product of this project is a FPGA DES Encryption Chip that is capable to encrypt or decrypt 64-bit blocks with 64-bit key. It has a simple architecture, high accuracy, high applicability and high speed. The maximum possible frequency can be used for the system is 29.33 MHz and the total of logic element used is only 708LE.