Publication: Pipeline microcontroller synthesizable design
Loading...
Date
2009-04-01
Authors
Zulkipli, Mohamad Izat Amir
Journal Title
Journal ISSN
Volume Title
Publisher
Abstract
The objective of this project is to design and synthesize a pipeline microcontroller by
using MentorGraphic EDA tool software such as Design Architect-IC, Modelsim and
Leonardo Spectrum. Pipeline microcontroller is the microcontroller that provides parallel
processing sequential order by using 3-stage pipeline design which separated into
predecode stage, decode stage and execute stage. This microcontroller synthesizable
design exposes the basic environment of how to studies and understanding the related
VHDL codes with more further besides understanding more about behavior of the
microcontroller and their functionality. The result and experiment has been conduct to
the simulation results, schematic, and layout of the pipeline microcontroller. By
mastering learning the synthesizable of 3-stage pipeline microcontroller, this project can
proceed for the hardware design microcontroller.