Publication: 10-bit digital-to-analog converter (dac) using partial binary tree network (pbtn) dynamic element matching (dem) approach
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Date
2019-06-01
Authors
Tan, Zi Jun
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Abstract
Digital-to-Analog converters (DAC) are an important element in many digital systems which demands high-performance data conversions. Due to factors like shrinking supply voltage and budget constraint, DAC highly relied on matched components to perform data conversion. However, matched components are nearly impossible to fabricate, because mismatch errors always occurred between designed and actual component value. One of the techniques to overcome the effect of mismatched components error is to use Dynamic Element Matching (DEM) method. This method randomizes the digital input codes before entering DAC block, making the time of each component position nearly equal. The drawback of this design is, it would suffer from excessive hardware complexity and causes glitches at the output signal. In this research, the DEM algorithm used is known as Partial Binary Tree Network (PBTN) algorithm. PBTN reduce the complexity of the circuit and produce an output signal with fewer glitches. In this research, the ideal Operational amplifier (Op-Amp) used to magnify the output current is replaced with an Op-Amp built by transistors. This thesis reports the simulation of 10-bit 1-MSB PBTN DAC using a non-ideal operational amplifier with DNL of -0.182979 LSB, INL of -0.959287 LSB and power consumption of 1.108 mW.