Publication: A design of a radio frequency energy harvester for 5G new radio application using CMOS 180nm technology
Date
2024-07
Authors
Vigneshwaran a/l Sundra Rajan
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Abstract
WSNs are becoming more and more popular for various uses, such as monitoring the environment and healthcare. However, traditional WSNs that use
batteries have problems such as short lifespans, environmental concerns, and difficulties with maintenance, especially in remote or hard-to-reach places. This
project addresses these issues by designing and simulating a RFEH specifically for 5G NR applications using CMOS 180nm technology. The goal is to create a RFEH system capable of harvesting ambient RF energy and converting it into usable DC power for WSNs. This project uses a CCDD rectifier topology, which is chosen due to its high PCE, low ON-resistance, minimal leakage current, and compatibility with CMOS technology. The project aims to optimize the CCDD rectifier design to achieve a maximum VDC of 2.5V and a sensitivity lower than -10 dBm at the 5 GHz operating frequency. An off-chip IMN is integrated with the rectifier to enhance performance. The design process uses Cadence Virtuoso software and the Silterra 180nm PDK for schematic design, layout and simulation. The RFEH’s performance is evaluated through harmonic balance, transient, and S-parameter analyses. The final design demonstrates excellent performance in both schematic and post layout simulations. In schematic, 2.5V VDC was achieved at -15.72 dBm, while 1V sensitivity was achieved at -21.27 dBm. As for post layout, results are slightly lower than schematic, but still shows impressive performance, with 2.5V VDC at -10.46 dBm and 1V sensitivity at 15.19 dBm, surpassing the objectives. This project contributed to the field of energy harvesting for WSNs by offering an efficient and low-power solution which can help
to extend lifespan of sensor nodes and reduce environmental impact from battery disposal.